Review Paper on Parallel prefix adders
The binary operations are simple, and mot customarily employed arithmetic procedures in digital system design. Adders are widely used in data processing applications specific integrated circuits (ASIC), and microprocessors.
All advanced microprocessor designs and digital signal processors (DSP) incorporate Arithmetic logic Unit (ALU). An adder is fundamental component of ALU that conducts both arithmetic and logical operations.
The existing adders are likewise utilized to conduct distinct binary functions including multiplication, encoding, decoding, compliments, and subtraction. They are also used for encryption and implementation of hashing functions [1].
In order to perform binary functions, several families of adders have been proposed with varying delays, area and power efficiency. Presently available adders for example, half adder, full adder,
